Cerebras CS-4 turns Nexus into a multi-generation rack-scale inference platform

On August 18, 2026, Cerebras introduced CS-4, a rack-scale system built from three WSE-3 Turbo processors and the first implementation of its new Nexus Platform Architecture. Nexus separates compute, power and I/O into modular assemblies. On August 25 at Hot Chips, Cerebras added an explicit multi-generation roadmap: Nexus is designed to support CS-4, CS-5 and CS-6; CS-5 is targeted for 2027 with a next-generation WSE, while CS-6 is planned to combine wafer-scale SRAM and compute with 3D-stacked DRAM. Cerebras says this modular platform gives it a path to roughly double token-generation speed year over year for the next several years. These roadmap numbers are forward-looking vendor targets, not independent benchmarks.

For builders and infrastructure operators, CS-4 changes the Cerebras story from a single unusual accelerator into a more modular rack-scale platform, and the Hot Chips roadmap strengthens that interpretation by showing Nexus is intended to persist across multiple processor generations. The new I/O and disaggregated-inference support make it easier to consider Cerebras alongside existing GPU or ASIC capacity rather than as an all-or-nothing stack. If Cerebras’ deployment, latency and future throughput claims hold in production, the architecture could materially alter the economics and responsiveness of reasoning-heavy, agentic and other latency-sensitive AI services. Procurement decisions still need workload-specific validation because the headline performance figures and future-generation targets remain vendor-produced.

CS-4 is the first system built on Cerebras’ Nexus Platform Architecture. Instead of treating compute, power and I/O as one tightly coupled rack design, Nexus packages them as modular subsystems. The compute element is a rear-mounted Wafer-Scale Backpack containing the wafer, power conversion, direct liquid cooling, high-speed I/O and controls. Cerebras says this design has 50% fewer components than its prior system and uses 60% more automated manufacturing, with the goal of reducing installation from days to hours.

On August 25, Cerebras said Nexus was co-designed for its next-generation WSE and previewed both CS-5 and CS-6. CS-5 is targeted for 2027 and is designed, according to Cerebras, to reach up to 10,000 output tokens per second per user on named open models such as Gemma 4 31B and gpt-oss-120b, and up to 5,000 output tokens per second per user on the largest frontier-class models. CS-6 is planned around 3D integration, pairing wafer-scale SRAM and compute with stacked DRAM so more model state can remain close to the wafer. These are forward-looking product targets rather than shipping specifications.

Cerebras moves power conversion to about 0.5 mm from the processor, which it says cuts board-level loss enough to deliver nearly twice as much power at almost the same voltage. The new Wafer I/O Module doubles off-wafer bandwidth to 2.4 Tb/s per wafer and supports both RoCE v2 RDMA over Ethernet and Direct Wafer Links. Cerebras says the direct links reduce wafer-to-wafer latency to as low as two microseconds, which is intended to preserve interactive decode as models span more wafers and racks.

A material architectural addition is explicit support for disaggregated inference. Cerebras describes GPU or ASIC systems handling prompt prefill and CS-4 handling low-latency decode, with AMD Helios and AWS Trainium named as complementary platforms. RoCE connectivity gives operators a standards-based integration path, while the programmable I/O layer leaves room for more specialized interconnects.

Cerebras advertises up to 30× faster inference than production GPU systems, up to 10× more throughput per watt than CS-3 and more than 1,000 tokens per second on models exceeding 10 trillion parameters. Its Hot Chips roadmap adds even larger CS-5 targets and an architectural CS-6 preview. Cerebras itself labels the roadmap forward-looking, and its site notes that performance comparisons rely on third-party benchmarking or internal testing. Builders should therefore treat the architecture and announced roadmap as established facts, while treating current and future performance numbers as claims to validate.

Cerebras says first CS-4 shipments begin in the third quarter of 2026. That makes this initially an infrastructure and provider story rather than a direct API change for most application developers. The downstream significance will depend on how quickly cloud and inference providers expose CS-4 capacity, what they charge, and whether lower latency survives real multi-tenant production workloads.